Simulation of implant free III-V MOSFETs for high performance low power Nano-CMOS applications (2007)
Attributed to:
Modelling of Carrier Transport in Ultra Thin Body Transistors
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1016/j.mee.2007.04.117
Publication URI: http://dx.doi.org/10.1016/j.mee.2007.04.117
Type: Journal Article/Review
Parent Publication: Microelectronic Engineering
Issue: 9-10