Power Attacks Resistance of Cryptographic S-boxes with added Error Detection Circuits (2007)
Attributed to:
Reassessing Processor Design Assumptions in Cryptography
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/dft.2007.61
Publication URI: http://dx.doi.org/10.1109/dft.2007.61
Type: Conference/Paper/Proceeding/Abstract
ISBN: 0-7695-2885-6