A GALS Infrastructure for a Massively Parallel Multiprocessor (2007)

First Author: Plana L
Attributed to:  A scalable chip multiprocessor for large-scale neural simulation funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/mdt.2007.149

Publication URI: http://dx.doi.org/10.1109/mdt.2007.149

Type: Journal Article/Review

Parent Publication: IEEE Design & Test of Computers

Issue: 5