Floating-Point FPGA: Architecture and Modeling (2009)
Attributed to:
Optimising Hardware Acceleration for Financial Computation
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/tvlsi.2008.2006616
Publication URI: http://dx.doi.org/10.1109/tvlsi.2008.2006616
Type: Journal Article/Review
Parent Publication: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Issue: 12