Design for Manufacturability of High Voltage Ics on SOI for automotive applications
Lead Participant:
PLESSEY SEMICONDUCTORS LIMITED
Abstract
The HIVICS project has demonstrated high voltage complementary Bipolar and MOS IC technologies integrated on Silicon on Insulator (SOI) substrates to achieve high performance and high area efficiency power devices for automotive and communication market applications.
To address the conflicting demands of electrical isolation, thermal management, stress, high-packing density and low on-resistance, advanced device architectures and novel SOI substrates were optimised for performance and manufacturability using advanced Technology Computer Aided Design (TCAD) simulations.
Novel Compound Buried Layers SOI substrates have demonstrated improved thermal conductivities and capacitances. Patterned buried Tungsten Silicide layers in SOI substrates have been developed for further performance improvements.
Accurate 3D modelling of thermal resistance of Bipolar devices on SOI was developed to create a circuit model that describes the thermal interaction between neighbouring cells.
A stress mediated oxidation model was developed and implemented into a 3D TCAD stress simulation tool and this was calibrated with measurements of Local Oxidation of Silicon (LOCOS) and Deep Trench Isolation structures.
To address the conflicting demands of electrical isolation, thermal management, stress, high-packing density and low on-resistance, advanced device architectures and novel SOI substrates were optimised for performance and manufacturability using advanced Technology Computer Aided Design (TCAD) simulations.
Novel Compound Buried Layers SOI substrates have demonstrated improved thermal conductivities and capacitances. Patterned buried Tungsten Silicide layers in SOI substrates have been developed for further performance improvements.
Accurate 3D modelling of thermal resistance of Bipolar devices on SOI was developed to create a circuit model that describes the thermal interaction between neighbouring cells.
A stress mediated oxidation model was developed and implemented into a 3D TCAD stress simulation tool and this was calibrated with measurements of Local Oxidation of Silicon (LOCOS) and Deep Trench Isolation structures.
Lead Participant | Project Cost | Grant Offer |
---|---|---|
PLESSEY SEMICONDUCTORS LIMITED | £1,792,625 | £ 703,885 |
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Participant |
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SILVACO EUROPE LIMITED | £700,872 | £ 227,500 |
QUEEN'S UNIVERSITY OF BELFAST FOUNDATION -THE | £297,730 | £ 297,728 |
UNIVERSITY OF SHEFFIELD | £391,726 | £ 391,726 |
MHS ELECTRONICS UK LIMITED | £203,224 | £ 78,727 |
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ORCID iD |