DCA: A DRAM-cache-Aware DRAM Controller (2016)
Attributed to:
Error-tolerant Stream Processing System Design (ESP-SD)
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/sc.2016.75
Publication URI: http://www.research.ed.ac.uk/portal/en/publications/dca-a-dramcacheaware-dram-controller(bf12c2b2-4991-481f-b0e6-f7cbdda4666f).html
Type: Conference/Paper/Proceeding/Abstract