A Real-Time Object Detection Accelerator with Compressed SSDLite on FPGA (2018)
Attributed to:
Event-based parallel computing - partially ordered event-triggered systems (POETS)
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/fpt.2018.00014
Publication URI: http://dx.doi.org/10.1109/fpt.2018.00014
Type: Conference/Paper/Proceeding/Abstract