An Overlay for Rapid FPGA Debug of Machine Learning Applications (2019)
Attributed to:
Event-based parallel computing - partially ordered event-triggered systems (POETS)
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/icfpt47387.2019.00024
Publication URI: http://dx.doi.org/10.1109/icfpt47387.2019.00024
Type: Conference/Paper/Proceeding/Abstract