Optimizing electronic standard cell libraries for variability tolerance through the nano-CMOS grid. (2010)

First Author: Walker JA
Attributed to:  Meeting the design challenges of the nano-CMOS electronics funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1098/rsta.2010.0150

PubMed Identifier: 20643688

Publication URI: http://europepmc.org/abstract/MED/20643688

Type: Journal Article/Review

Volume: 368

Parent Publication: Philosophical transactions. Series A, Mathematical, physical, and engineering sciences

Issue: 1925

ISSN: 1364-503X