Resistive switches (RRAM) and memristive behaviour in silicon-rich silicon oxides

The main goal of this project is to develop a fundamental understanding and applications of resistive switching in silicon-rich oxide. This may lead to a breakthrough in low-cost on-chip integration of Resistive Random Access Memory (RRAM) devices with Si microelectronics. To achieve that we will carry out detailed experimental studies of switching; develop a physical switching model; apply this model to design and fabricate demonstrator devices; characterise the devices, and develop circuit-level models for systems incorporating Si RRAM and hence extend the capabilities of Si microelectronics into new domains and applications.

RRAM devices are components whose electrical resistance can be varied by applying an appropriate voltage. They are promising candidates for next generation electronic memories, offering a number of significant advantages over conventional Flash memory, including: very high packing density; fast switching; low energy switching; 3D integration to further increase memory capacity; ease of processing. Existing RRAM technologies are primarily based on metal oxide materials. However, Si- based devices have a number of advantages, including ease of integration with silicon CMOS processing technology, along with the possibility to tailor their electrical properties by varying programming voltage pulses.

RRAM devices have potential applications beyond memory: if the device resistance can be continuously varied they may behave in a similar way to neurons, and may therefore be used in novel neural networks or other processing architectures. Also, as resistive switching shares many of the features of oxide failure in CMOS devices, the results from a study of RRAM will yield valuable information that may help reduce device failure, or even recovering damaged devices.

We have recently developed a Si/SiO2 RRAM. Unlike competing technologies, it does not rely on the diffusion of metal ions, can be fabricated only from Si and SiO2, and operates in ambient conditions. Resistance contrast is up to 1,000,000, switching time <90ns, and switching energy 1pJ/bit or lower. Scanning Tunnelling Microscopy suggests individual switching elements as small as 10nm. Devices can be cycled thousands of times and can be operated in either unipolar or bipolar modes, with different characteristics in each: in the former, binary switching between discrete levels can be achieved, while in the latter we are able to continuously vary the device resistance, opening up the possibility of analogue devices such as memristors.

Our devices are an alternative to existing metal oxide-based devices. The Si/SiO2 system is the building block of Si CMOS technology - our devices require no other material. We have found that the externally-set current compliance required for reliable resistive switching in metal oxide systems is not necessary in SiOx devices - asymmetric doping of the structure produces intrinsic self-limiting. In addition, the high degree of nonlinearity inherent in our semiconductor-based RRAM devices mitigates the problem of parasitic leakage currents in arrays of RRAM devices.

Our project will go further than experimental studies of Si/SiO2 RRAM devices. We will also develop comprehensive theoretical models for the resistance switching process, and circuit-level models to investigate the application of our RRAM devices in real systems. Our approach is novel and unique in that it goes all the way from the atomistic modelling and electrical characterization of materials and fundamental electronic and ionic processes involved in resistive switching, through the simulation and fabrication of experimental devices to their optimisation and potential implementation in technology. This can only be achieved via synergy of expertise available at UCL and Glasgow.

This work has the potential to have significant impact both on the academic community and beyond, dealing as it does with fundamental studies of the physical processes underlying resistive switching and their application to novel silicon microelectronic devices.

Within academia the main beneficiaries will be the emerging Resistive Switching community, the silicon microelectronics community, and the memristor community. The UK is active in each of these (as testified in the latter case by recent EPSRC funding - see the Academic Beneficiaries section). In many of these areas the UK plays a leading role, and our work is likely to stimulate further academic interest both within the UK and internationally.

Those who will most directly benefit beyond academia include: the silicon microelectronics and CMOS industries; those engaged in More than Moore and Beyond Moore activities; the neural networks community; device modellers; solid-state physicists engaged in defect studies; chip manufacturers; memory manufacturers; chip designers, and the space electronics community, thanks to the radiation tolerance of RRAM devices. We are already engaging with industry in our early work, having patented our technology and brought three project partners on board. The partners will provide valuable advice on commercialisation and maximising impact, and will also be closely involved with the scientific aspects of the project.

We anticipate a timescale of 5-10 years for the commercialisation of Si RRAM. Current work on RRAM and novel non-volatile memory concentrates on commercialising transition metal oxide-based technologies as Flash replacements or embedded memory within 18-24 months. Si RRAM is at an early stage in this process, though it may benefit from current transition metal oxide RRAM work. It is not clear at this point what will be the main applications of our early stage technology Si RRAM, though there are several promising options, and our main aim is to lay the ground work in understanding the mechanisms of Si RRAM, simulating potential architectures, and applications and assessing the reliability and variability issues of potential devices. Flash memory and other embedded memories are likely areas of impact, as is device failure and recovery, but one further area is communities concerned with neuromorphic systems and neural networks not requiring high tolerances. Here the short-term impact (3-6 years) will predominantly be academic, but longer-term benefits (10-20 years) are expected as the technology matures.