Feasibility of Novel Deca-nanometer vertical MOSFETs for low-cost Radio Frequency Application

Lead Research Organisation: University of Southampton
Department Name: Electronics and Computer Science


Markets for radio frequency (RF) devices are various and cover ranges of low voltages (1.5, 3V etc.) for mobile applications. Conventionally, the devices required to build the front-end amplifiers are built within the same process as the digital CMOS circuitry which dominates the overall system realisation. The state-of the-art (SOA) CMOS processes are relatively expensive especially for lower volume production which is attractive to smaller companies and start-ups. Our proposal is to provide a high performance vertical MOSFET within a standard digital CMOS process such that the minimum feature size can be rather larger than SOA allowing a lower cost solution. The higher performance for the vMOST comes from the ease of producing a very short channel vertically using standard ion-implantation, rather than laterally which requires expensive patterning techniques (lithography). We have already shown the feasibility of a number of novel solutions to address some of the inherent propblems of vMOSTs. We believe that a high performance 0.1um vertical transistor with high gain and high operating voltage will be able to provide significant advantages for the market. Like all developments, it depends on the performance that can be achieved economically, and this is a key aim of this project. A sub- 0.1um transistor should exhibit an fT of around 100GHz and so provide useful power to over 10GHz. This would allow the replacement of GaAs and LDMOS devices in power stages of cellular and wireless LAN applications up to 5GHz. New connectivity and satellite uplink applications operate in frequencies up to 12GHz, and so the feasibility of the vertical MOSFET for this regime is a further objective.


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Description This project researched ways of making sub-100nm MOS transistors using mature (0.35 micron) photolithography. The idea was to provide a cheap method of turbo-boosting 0.35 micron CMOS to provide improved RF performance. The research was successful in producing vertical MOSFETs with sub-100nm channel lengths and world record performance.
Exploitation Route The technology could be exploited by small semiconductor companies in niche RF markets. Plessey Semiconductor were involved in the project, but they have since moved away from the RF market into new markets.
Sectors Electronics

Description The research undertaken was long-term and has application at the end of the CMOS roadmap.
First Year Of Impact 2014
Sector Electronics
Impact Types Economic