Visiting researcher application: Massive Multiprocessor Architectures
Lead Research Organisation:
University of Cambridge
Department Name: Computer Science and Technology
Abstract
The proposal is to support an extended visit to the Computer Laboratory at Cambridge from Professor Andrew Brown, from Southampton. The headline objective is to undertake a feasibility study and design a strategy for an extended collaboration between the Universities of Cambridge, Southampton and Manchester.Southampton and Manchester have a grant entitled A scalable chip multiprocessor for large-scale neural simulation (EP/D079594/01). A year into this, it has become clear that the potential application arena for the architecture being developed extends far beyond the initial mandate of neural simulation. Cambridge are building a FPGA based hardware /software infrastructure to enable manycore parallel computer architectures to be simulated in (near) real time. They have a recently awarded grant entitle C3D - Communication Centric Computer Design (EP/F018649/1). Conventional parallel processing systems are large and expensive, and provide hundreds or thousands of processing nodes. Large scale distributed systems (seti@home et al) potentially provide millions of cores, but with extremely limiting bandwidth constraints.The work at Cambridge/Southampton/Manchester has the potential - for the first time - to make available a tightly-coupled, scalable, million core+ architecture. Brushing aside for the moment such fundamental issues as how one might even design a pan-processor compiler for such a system, one of many unanswered questions is What might we do with it if we had one? Although applications have a way of migrating themselves towards useful architectures, attempting to foresee the sphere of use as early as possible in the design stage has obvious benefits to the design process at many levels of granularity.Potential application arenas include:* Neural simulation (the focus of the existing Southampton/Manchester grant)* Discrete and continuous system/network simulation* Finite element analysis* Ray-tracing and rendering* Protein folding prediction* Data-mining, pre-emptive disaster predictionThis visit will support the construction of a detailed roadmap describing the research to be undertaken; one particular application (protein folding) pursued in a little more detail; and the feasibility of bringing together the two threads of activity (the Manchester/Southampton scalable architecture and the Cambrudge FPGA farm) assessed in some detail.
People |
ORCID iD |
Simon Moore (Principal Investigator) |
Publications
Brown A
(2012)
Behavioural synthesis utilising recursive definitions
in IET Computers & Digital Techniques
Description | All three of the original objectives have been met: 1. The feasibility study resulted in the design, completion and submission of a four-party large grant proposal (EP/G015783/1, EP/G015775/1, EP/G015627/1, EP/G015740/1) entitled "Biologically-Inspired Massively-Parallel Architecture - computing beyond a million processors". The ultimate scope of this proposal far exceeded our initial intentions, and the outcome of this effort is due to be known within a few days of this report. All reviews indicated that the proposal was "Outstanding" and "Should Proceed". 2. The work on the Cambridge FPGA farm (funded from another project: EP/D036895) was delayed because there were manufacturing and supply issues of the hardware we required (BEE3 units from BEEcube). These units eventually arrived in September 2008 after help from Xilinx who donated $24,000 of FPGA parts. As an interim solution, an FPGA system was constructed from 36 Altera DE2 boards (used for teaching purposes in October and November) arranged in a hexagon. The DE2 system allowed research to proceed and ideas fed into the outcome of the first objective. 3. Progress was made on the protein-folding work and a patent arising from the work has been filed (GBP96634 - Parallel processing system and algorithms). This research is promising and it is our intention to continue the work. |
Exploitation Route | This work lead to the £5m BIMPA (EP/G015783/1) project being funded by EPSRC. |
Sectors | Digital/Communication/Information Technologies (including Software),Electronics |
Title | Parallel processing system and algorithms |
Description | |
IP Reference | GBP96634 |
Protection | Patent granted |
Year Protection Granted | |
Licensed | No |