A bidirectional power/data transfer platform based on electro-optical effects in standard CMOS

Lead Research Organisation: Imperial College London
Department Name: Institute of Biomedical Engineering

Abstract

With the recent surge in the demand for lab-on-chip applications, the requirement for a low-cost integration of different technologies, in particular CMOS/MEMS and microfluidics has become crucial. Economies-of-scale especially driven by the semiconductor industry favour solutions based on unmodified commercial processes. The constraints dictated by the varying range of physical dimensions of the different components make wafer-level integration too costly for low-cost mass manufacture. For example, a typical lab-on-chip application may require CMOS components of area in the region of 1-10 sq. mm, MEMS components in the region of 25-100 sq. mm and microfluidics components in the region of 200-2500 sq. mm. Therefore integrating these at wafer level would be hugely wasteful to CMOS/MEMS technologies, as the common lab-on-chip area would be constrained by the requirement of interfacing fluids and external systems to the devices. A common technique for integrating these components at die-level, for example in chemical sensing, includes the following sequence. Wire bonding the chip to a package or substrate, encapsulating the wire bonds in an insulating material, levelling off the top surface, patterning the sensing regions (on chip surface) through the encapsulant, and finally aligning and laying on the microfluidics layers. The main challenges to this approach are all related to the fact that the bond wires are protruding above the sensing surface. In addition to this resulting in crucial reliability issues, the surface geometry is vastly affected, i.e. unwanted wells are created inside the bond pad regions and, the top surface (above the encapsulant) is far from planar- resulting in sealing and thus reliability issues when overlaying the microfluidics. A novel solution to this integration problem is proposed here. The idea is to develop a methodology for interfacing to CMOS chips without any bond wires such that the top chip surface is left planar with no bondpad openings. The challenge is therefore to develop a technique to: (1) provide power and control signals to a CMOS chip and (2) communicate data from the CMOS chip to an external device in a contactless fashion. Furthermore, an added challenge of having no off-chip connections is that no off-chip components, for example, antennas or capacitors can be used- such as in the case of RFID's. We therefore propose to apply optical techniques in a hybrid PCB/CMOS assembly such that the top surface is left virtually planar with all external components being mounted underneath the CMOS die. The scheme intends to supply power and control via an infrared (IR) emitter through the silicon using a relatively large area deep well photodiode to recover power and data. The transmitted light (i.e. non-absorbed photons) can therefore be modulated using electro-optical effects and reflected back through the die to a detector mounted beneath the CMOS die. The data can therefore be extracted from the received signal using relatively simple discrete electronics. Although this scheme is initially intended for hybrid, lab-on-chip applications, the wider scope for exploitation is enormous, with an impacting application-base throughout the microelectronics industry.
 
Description With the recent surge in the demand for lab-on-chip applications, the requirement for a low-cost integration of different technologies, in particular CMOS/MEMS and microfluidics has become crucial. Economies-of-scale especially driven by the semiconductor industry favour solutions based on unmodified commercial processes. The constraints dictated by the varying range of physical dimensions of the different components make wafer-level integration too costly for low-cost mass manufacture. A common technique is therefore to integrate these components at die-level; however, this brings on its own challenges. For example, to package a lab-on-chip system for chemical sensing requires careful encapsulation of delicate bond wires and the engineering of a robust seal for fluidic isolation. This presents a question on reliability but also a bottleneck in scalability, i.e. for mass manufacture.

This research has proposed a radically different approach to solving this interconnect problem. Instead of connecting fine wires between the chip and package, the concept of a truly contactless CMOS lab-on-chip (i.e. zero bond wires) has been put forward. Specifically, this project has explored the feasibility of developing a fully optical link (i.e. delivering power to a chip and communicating data to/from) with the constraint of utilising only unmodified, commercially available CMOS technology and no wired off-chip components. The concept put forward for addressing the challenging data out communication task, involves utilising an external infrared light source (eg. LED), passing this through a CMOS chip (in free space) and detecting the remaining light using an external photodetector. By implementing an optical modulator on-chip using simple pn-junctions, the free-carrier absorption in the optical path can be controlled and thus data can be encoded and communicated to the external photodetector. The chip can be powered through a simple solar cell arrangement (using an on-chip photodiode).

Specific project outcomes include:

- Demonstrating the world's first implementation of a free-space optical modulator in unmodified, commercially available CMOS technology. This is significant because silicon is an indirect bandgap material and therefore light sources cannot be efficiently integrated.

- Investigating the effect of free carrier absorption in silicon CMOS technology, the key parameters (eg. doping concentration, device topology and structure, optical wavelength, alignment, etc) and compared performance at three different process nodes (specifically 0.13, 0.18 and 0.35 micron).

- Developing an optoelectronic test platform (i.e. laboratory apparatus) for a free space optical link between discrete (external) devices (i.e. light source and detector) and an integrated circuit based modulator. Specific features include: (1) multiple light sources (eg. infrared/visible-light lasers/LEDs/incandescent sources), (2) precise alignment and positioning, (3) continuous-time or phase-locked detection.

- Prototyping several integrated devices, circuits and systems for optical scavenging (parasitic pn-junction photodiode structures) and power management (charge pumps, regulators, bias references) to provide a stable on-chip power supply towards developing truly contactless CMOS chips.

- Securing the background intellectual property to this invention.

All the project outcomes listed above have/are in process of been disseminated in peer reviewed publications (available open access via our institutional library portal).

Ongoing and future research will concentrate on further optimizing the structures that have already been developed towards the monolithic integration in commercial lab-on-chip platforms.
Exploitation Route Applying/further developing/optimising the CMOS integrated optical modulator for other applications.
Sectors Digital/Communication/Information Technologies (including Software),Electronics,Manufacturing, including Industrial Biotechology,Other

 
Description Research outcomes have been disseminated through journal publication, at a number of conferences, workshops, etc. Any results will be useful to the wider community (biomedical circuits and systems, CMOS photonics) to develop next generation integrated photonic systems. Ongoing (and followup) research is applying the methods and devices that were developed in this project to enable entirely new applications- for example, the optical recording of neural activity.
First Year Of Impact 2012
Sector Digital/Communication/Information Technologies (including Software),Electronics,Pharmaceuticals and Medical Biotechnology,Other
Impact Types Economic

 
Description "Toward Non-invasive Optical Neural Recording Without Molecular Reporters" (Impact Acceleration Account)
Amount £25,755 (GBP)
Funding ID EP/K503733/1 
Organisation Engineering and Physical Sciences Research Council (EPSRC) 
Sector Academic/University
Country United Kingdom
Start 12/2014 
End 09/2015
 
Description University of Queensland (P2I) 
Organisation University of Queensland
Country Australia 
Sector Academic/University 
PI Contribution Combining outcomes of our research (CMOS optical modulator) and facilities/resources available at the University of Queensland (self:mixing" sensor" based" on" THz"QCL") to explore a new research idea for optical neural recording without needing molecular reporters.
Collaborator Contribution Providing use of facilities/equipment that they have developed.
Impact Too soon. Ongoing
Start Year 2014
 
Title Method and Apparatus for Optically Outputting Information from a Semiconductor Device 
Description A method of optically outputting information (e.g. digital data) from a semiconductor device, the method comprising: providing a semiconductor device having a semiconducting p-n junction, the p-n junction having a region of reduced free charge carrier density; applying an electrical signal to modulate the extent of the said region, the electrical signal being representative of the information to be outputted; arranging incident light to pass through at least part of the said region, such that the light is at least partially absorbed in dependence upon the modulated extent of the said region, thereby producing intensity-modulated output light; and detecting the intensity of the output light and thereby determining the outputted information. Also provided is an electro-optical assembly, a package module for mounting a semiconductor device on a printed circuit board, and an integrated circuit chip. 
IP Reference WO2011095767 
Protection Patent application published
Year Protection Granted
Licensed No
Impact N/A