Border Patrol: Improving Smart Device Security through Type-Aware Systems Design

Lead Research Organisation: University of Glasgow
Department Name: School of Computing Science


There are increasing concerns about the safety and security of critical infrastructure such as nuclear power plants, the electricity grid and other utilities in the face of possible cyber attacks. As ageing controllers are replaced by smart devices based on Field-Programmable Gate Arrays (FPGAs) and embedded microprocessors, the safety of such devices raises many concerns. In particular, there is the very real risk of malicious functionality hidden in the silicon or in software binaries, dormant and waiting to be activated. Current
hardware and software systems are of such complexity that it is impossible to discover such malicious code through testing.

We aim to address this problem by closely connecting the system design specification with the actual implementation through the use of a formal design methodology based on type systems with static and dynamic type checking. The type system will be used as a formal language to encode the design specification so that the actual implementation will automatically be checked against the specification.

Static type checking of data types and multiparty session types can ensure the correctness of the interaction between the components. However, as static checking assume full access to the design source code it cannot be used to protect against potential threads issuing from third-party functional blocks (know as ``Intellectual Property Cores'' or IP cores) that are commonly used in hardware design:
the provider of the IP core can claim adherence to the types and protocols, so that the IP core will meet the compile-time requirements, but the run-time the behaviour cannot be controlled using static techniques. The same applies to third-party compiled software libraries.
Therefore we propose to use run-time checking of data types as well as session types at the boundaries of untrusted modules ("Border Patrol"), so that any intentional or unintentional
breach of the specification will safely be intercepted.

Planned Impact

Realising our vision will lead to a revolution in the programming of FPGA-based Systems-on-Chip in particular and embedded systems in general. Progress in the area of systems security is essential to ensure trust in critical infrastructure (e.g. controllers for nuclear power plants) as well as consumer products (cars, smart household appliances). Thanks to the strong theoretical foundations of our work, our methodology will provide very string guarantees about system security. Adoption of our approach into standards for embedded systems would have a very significant impact by removing the security concerns related to the adoption of such systems.

Our proposed work will lead to highly novel compiler technologies, based on a sound formal foundation with guarantees for systems integrity. Not only will our approach make systems more secure, it will also make application development more efficient..

In a nutshell, our methodology encodes the design specification of the system in the type system, so that it is not possible to design a system implementation that does not conform to the formal specification. There is a clear need for more secure systems design, driven by the sectors mentioned above: protection of critical infrastructure is becoming more and more important not only because of the increased threat level but also because aging controller are being replaced with smart devices. The Internet of Things promises a revolution in the home by allowing us a high degree of remote control over our appliances, but security is crucial because compromising such systems could lead to nightmare scenarios. The same is true for the automotive industry: already embedded systems in cars have been hacked, demonstrating the need for a more secure desing approach.

The applications domain for our work is very broad, both in terms of the sectors where smart devices and FPGA-based systems are deployed (much wider than the three examples cited above) but also in terms of applications that are not security related. The obvious one is safety, because our approach makes systems more safe as well as more secure. But apart from that, the adoption of the advanced type systems we propose into design tools and methodologies will make systems design more efficient as well: by dramatically reducing the amount of errors and catching the errors much sooner in the design phase, the debugging times will be reduced very considerably.

Impact of our work will result primarily from adoption of our approach in industry and academia. The Pathways to Impact document explains how we will achieve this impact.


10 25 50
publication icon
Archibald B (2018) Replicable parallel branch and bound search in Journal of Parallel and Distributed Computing

publication icon
Ghilezan S (2019) Precise subtyping for synchronous multiparty sessions in Journal of Logical and Algebraic Methods in Programming

publication icon
Graversen E (2019) Towards a categorical representation of reversible event structures in Journal of Logical and Algebraic Methods in Programming

publication icon
Imai K (2019) Session-ocaml: A session-based library with polarities and lenses in Science of Computer Programming

publication icon
Kouzapas D (2019) On the relative expressiveness of higher-order session processes in Information and Computation

publication icon
Neykova R (2017) Timed runtime monitoring for multiparty conversations in Formal Aspects of Computing

publication icon
Scalas A (2018) Multiparty session types, beyond duality in Journal of Logical and Algebraic Methods in Programming

Description We have developed a framework of domain-specific languages to describe Systems-on-Chip in such a way that the type system of the language is used as the specification of the composition of the system. That means that we can formally guarantee that the System-on-Chip design is composed of the right components and that they are connected correctly.
Exploitation Route Our work could be implemented in an IDE for SoC design such as the Xilinx SDSoC tool or similar tools, to ensure the correctness of the designs created.
Sectors Digital/Communication/Information Technologies (including Software),Electronics

Title Replicable Parallel Branch and Bound Search 
Type Of Material Database/Collection of data 
Year Produced 2017 
Provided To Others? Yes  
Title A Linear Decomposition of Multiparty Sessions for Safe Distributed Programming (Artifact) 
Description This artifact contains a version of the Scribble tool that, given a protocol specification with multiple participants, can generate Scala APIs for implementing each participant in a type-safe, protocol-abiding way. Crucially, the API generation leverages a decomposition of the multiparty protocol into type-safe peer-to-peer interactions between pairs of participants; and this, in turn, allows to implement the API internals on top of the existing lchannels library for type-safe binary session programming. As a result, several technically challenging aspects in the implementation of multiparty sessions are solved "for free", at the underlying binary level. This includes distributed multiparty session delegation: this artifact implements it for the first time. 
Type Of Technology Software 
Year Produced 2017 
Description Talk at the ARM Research Summit 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Industry/Business
Results and Impact The ARM Research Summit is a conference organized by the multinational microprocessor company ARM. This forum allows us to reach an industry audience and has been a great way to create industry contact for future projects. In particular, ARM Is now part of the advisory board of the Border Patrol.
Year(s) Of Engagement Activity 2017