Low-Dimensional Electronic Device Fabrication at Low Cost over Large Areas

Lead Research Organisation: University of Cambridge
Department Name: Engineering


There is a general rule of thumb that the cost of manufacturing doubles every time the precision is improved by a factor of ten. Crudely, this is why it costs billions of pounds to set up a fabrication plant to manufacture microprocessors, where the physical size of the transistors being manufactured is on the length scale of a few nanometre, compared with the cost of setting up a facility to manufacture printed circuit boards which sufficiently cheap to be widely available, but features are on the scale of hundreds of micrometers.

There are cases of where this rule can be broken. One is in the use of low-dimensional materials which naturally form on a nanometre length scale. An example of this is graphene, which has received a lot of attention in recent years. It naturally forms in a two-dimensional sheet of carbon atoms, and so does not need to be 'machined' to achieve a nanometre-scale thickness. Such 'bottom-up' processes achieve high resolution at very low cost, which is one reason for the interest. However, they still require electrical contacts to be made to the materials to define a complete device. Ideally, we would like to use only a small quantity of these materials, for example by patterning two metal electrodes separated by only a few nanometre with the low-dimensional material (e.g. graphene) inside the nanogap. As the patterning of the metal one this length scale requires a high resolution process, the cost becomes prohibitive again.

This project aims to tackle this manufacturing problem directly by combining an emerging technique called 'adhesion lithography' with the growth of low-dimensional materials to create the structures required to make real electronic devices using these materials. Adhesion lithography uses self-assembled monolayers (SAM) to control how well different materials can stick to each other. This allows one metal to be deposited onto a low-cost substrate, like plastic, and patterned using a low cost, low resolution process and a second to be deposited everywhere over the top. Using the SAM, it is possible to ensure that the second metal does not stick to the first. This allows the second metal to be peeled away from the first, uncovering it in the process and leaving a nanogap all around the edge of the first metal. A nanometre scale structure has
therefore been manufactured, but without the associated cost.

The peeling process has been shown to be critical to make this work. Therefore, this project aims to design and build a low cost tool to carry out this peeling process on a 10x10 cm length scale, but with a clear route to scaling up to large areas (e.g. an A3 sheet). In addition, we will show that the nanogap can be incorporated with the deposition of a low-dimensional material to create a genuine electronic nanoscale device, but with the cost of a much larger device. We expect the this will allow entirely new devices to be developed for a whole range of applications, from logic to memories to sensors.

Planned Impact

This project will have impacts across a diverse range of areas as its aim is to develop a technique for manufacturing electronic devices that take advantage of low-dimensional materials but at low-cost and over large areas.

A key output from this project is the development of a tool that is capable of patterning ~10 nm gaps between dissimilar metal electrodes and its integration into a process for filling this gap with low-dimensional materials, such as graphene and zinc oxide nanowires, to create electronic devices. There has been significant research effort put into the development of 'bottom-up' materials which naturally self-assemble into a low-dimensional nanostructure. Whilst there has been some success in creating electronic devices using these materials by combining them into polymer composites and printing them, the properties of the low-dimensional material are compromised by the polymer matrix. Therefore, the theoretical properties of these materials have not been practically accessible. The output from this project - namely the tools and associated processing information - will provide a clear route for the electronics industry in the UK and beyond to use these materials. The UK electronics industry has a long history of generating valuable intellectual property. By opening up this manufacturing process it is anticipated that this will naturally lead to new IP generation. In the short-term we will support this process by making the tool and associated recipes available to industrial users through the Electrical Engineering Clean Facility in Cambridge. This is an open access facility with a long track record of having SMEs, particularly from the vibrant Cambridge area, using equipment. In the longer term, we would like to partner with other companies and the Centre for Process Innovation (CPI) CATAPULT to see a scaled-up version of the tool in operation at CPI.

This project will allow the postdoctoral research associate working on this project to significantly develop their research skills. The project will be very outward-focussed with a need to communicate the benefits of adhesion lithography to potential end users. This will require development of communication skills. We are already offering final year undergraduate projects on adhesion lithography to students on the M.Eng. course at Cambridge. This will help to expose the opportunities of the process and the use of low-dimensional materials to the next generation of electronic engineers.

The development of mobile electronic devices, and in particular the smartphone, has transformed our daily lives. This is leading to a digitally connected future, commonly called the 'Internet of Things' in which everything has a digital presence. This requires high performance electronics to be distributed, but this only makes economic sense if the electronics is very low cost. This will require being able to take full advantage of the properties of low-dimensional materials and integrating these with low-cost and large-area substrates, such as plastic. This is exactly the space in which this work sits.

Finally, there is a in academic benefit to the research. This project will allow the electronic properties of low-dimensional materials to be studied on a nanometre length scale with relative ease. Researchers will be able to more quickly optimise new low-dimensional materials and understand their fundamental electronic properties.


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Description This project is looking to develop a new low cost process called 'Adhesion Lithography' for creating gas between metal electrodes ~10 nm in length. We are then putting nanomaterials into these gaps to create functional electronic devices. To date, we have been addressing the first objective of the project to construct an adhesion lithography tool for making the process, which has been proven on a small scale, scalable to 10×10 cm areas. In parallel, we have been develping processes for creating gaps betweem a variety of dissimilar metals and investigating both two- and three-terminal device structures
Exploitation Route We intend for the design for the adhesion lithograpy tool and processing information to be freely available on the web for others to employ - in particular we hope that the UK large-area electronics and nanomaterials inductries will pick this up.
Sectors Electronics