DART: Design Accelerators by Regulating Transformations
Lead Research Organisation:
Imperial College London
Department Name: Computing
Abstract
The DART project aims to pioneer a ground-breaking capability to enhance the performance and energy efficiency of reconfigurable hardware accelerators for next-generation computing systems. This capability will be achieved by a novel foundation for a transformation engine based on heterogeneous graphs for design optimisation and diagnosis. While hardware designers are familiar with transformations by Boolean algebra, the proposed research promotes a design-by-transformation style by providing, for the first time, tools which facilitate experimentation with design transformations and their regulation by meta-programming. These tools will cover design space exploration based on machine learning, and end-to-end tool chains mapping designs captured in multiple source languages to heterogeneous reconfigurable devices targeting cloud computing, Internet-of-Things and supercomputing. The proposed approach will be evaluated through a variety of benchmarks involving hardware acceleration, and through codifying strategies for automating the search of neural architectures for hardware implementation with both high accuracy and high efficiency.
Organisations
- Imperial College London (Lead Research Organisation)
- Deloitte UK (Project Partner)
- Tianjin University (Project Partner)
- Corerain Technologies (Project Partner)
- Intel Corporation (UK) Ltd (Project Partner)
- Xilinx Corp (Project Partner)
- Microsoft Research (Project Partner)
- Maxeler Technologies Ltd (Project Partner)
- RIKEN (Project Partner)
- University of British Columbia (Project Partner)
- Cornell University (Project Partner)
- Stanford University (Project Partner)
- Dunnhumby (Project Partner)
People |
ORCID iD |
| Wayne Luk (Principal Investigator) |
Publications
Denholm S
(2023)
Customisable Processing of Neural Networks for FPGAs
Fan H
(2022)
FPGA-Based Acceleration for Bayesian Convolutional Neural Networks
in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Fan H
(2022)
Enabling fast uncertainty estimation
Fan H
(2022)
Accelerating Bayesian Neural Networks via Algorithmic and Hardware Optimizations
in IEEE Transactions on Parallel and Distributed Systems
| Description | Reliable and Robust Quantum Computing |
| Amount | £2,227,394 (GBP) |
| Funding ID | EP/W032635/1 |
| Organisation | Engineering and Physical Sciences Research Council (EPSRC) |
| Sector | Public |
| Country | United Kingdom |
| Start | 03/2022 |
| End | 03/2026 |
| Description | SONNETS: Scalability Oriented Novel Network of Event Triggered Systems |
| Amount | £6,467,613 (GBP) |
| Funding ID | EP/X036006/1 |
| Organisation | Engineering and Physical Sciences Research Council (EPSRC) |
| Sector | Public |
| Country | United Kingdom |
| Start | 01/2024 |
| End | 12/2028 |