Q-dot-Glass based Thermoelectric Cooling (Q-Dot-TEC) by Thermal Energy Harvesting
Lead Research Organisation:
University of Leeds
Department Name: Chemical and Process Engineering
Abstract
The technology has evolved drastically over various stages of industrial revolution from usage of coal, steam and water to current stage chip technology, artificial intelligence and big data which relies on lots of data transfer (5G). With data as new oil, data centres will need large storage capacities which in turn increases power consumption of ICT sector. The energy demand in ICT sector implies that global carbon footprint for increasing the capacity of digital infrastructure may become unsustainable at a current rate in future!
Hence the present proposal aims to develop a novel single platform technology using on-chip energy harvesting of heat dissipated by electronic and photonic chips during their operation. The future of manufacturing PICs will adapt with the software design options by incorporating on-chip thermal management programme, which will then become a part of the chip substrate and component assembly process using the advanced robotic technology. The missing feature in robotically controlled integration has been thermal management engineering and its implementation on chip at low cost and power budget. Our methodology is based on engineering a unique chip using Q-dot doped glass during manufacturing. This chip will constitute Q-dot glass layer on SOI substrate, followed by selective growth of n- and p-type semiconductor layers on it. The heat dissipated from operating components will be absorbed by Qdot glass which then be transferred to adjoining n and p-type semiconducting layers for the generation of charge carriers. These charge carriers will generate current. This project will be a cross-disciplinary project which aims to provide solution for an outstanding problem of heat dissipation in the existing chip technology (electronic and the PICs) and future energy crisis using (i) Materials synthesis and deposition ii) Materials characterizations iii) Device based characterisation iv) Manufacturability of the thermal energy harvesting devices.
Hence the present proposal aims to develop a novel single platform technology using on-chip energy harvesting of heat dissipated by electronic and photonic chips during their operation. The future of manufacturing PICs will adapt with the software design options by incorporating on-chip thermal management programme, which will then become a part of the chip substrate and component assembly process using the advanced robotic technology. The missing feature in robotically controlled integration has been thermal management engineering and its implementation on chip at low cost and power budget. Our methodology is based on engineering a unique chip using Q-dot doped glass during manufacturing. This chip will constitute Q-dot glass layer on SOI substrate, followed by selective growth of n- and p-type semiconductor layers on it. The heat dissipated from operating components will be absorbed by Qdot glass which then be transferred to adjoining n and p-type semiconducting layers for the generation of charge carriers. These charge carriers will generate current. This project will be a cross-disciplinary project which aims to provide solution for an outstanding problem of heat dissipation in the existing chip technology (electronic and the PICs) and future energy crisis using (i) Materials synthesis and deposition ii) Materials characterizations iii) Device based characterisation iv) Manufacturability of the thermal energy harvesting devices.
Organisations
Publications
Al-Murish M
(2023)
Engineering of Solar Energy Harvesting Tb3+-Ion-Doped CdS Quantum Dot Glasses for Photodissociation of Hydrogen Sulfide.
in ACS applied energy materials
Jha A
(2023)
Encyclopedia of Materials: Electronics
| Description | We have now established heterostructure growth of Q-dot glass structures with MoS2 on Silicon substrate. This work is progressing now towards device engineering and characterisations. |
| Exploitation Route | Device engineering and further collaboration with catapults and industry. |
| Sectors | Digital/Communication/Information Technologies (including Software) Electronics |
| Description | Impacts so far: a) Creating a pulsed laser deposition facility for heterostructure thin film growth b) Collaboration with CST Newport c) Early discussion with British Telecom on net zero targets for OEICs and PICs |
| First Year Of Impact | 2023 |
| Sector | Energy,Manufacturing, including Industrial Biotechology |
| Description | Visit to Catapult CST in Newport for attending the Workshop on thin film materials integration |
| Form Of Engagement Activity | Participation in an activity, workshop or similar |
| Part Of Official Scheme? | No |
| Geographic Reach | Regional |
| Primary Audience | Professional Practitioners |
| Results and Impact | Dr Geeta Sharma went to attend the Workshop organized by the CST Catapult at Newport, S Wales. This workshop was for explaining the support facilities which are available at CST. Since Dr Sharma's Fellowship relates with the integration of thin film devices, the visit also explored future collaboration route for working with CST on a new porject, which is being considered. |
| Year(s) Of Engagement Activity | 2023 |