Efficient Variation-Aware Delay Fault Simulation Methodology for Resistive Open and Bridge Defects (2014)

First Author: Shida Zhong
Attributed to:  Variation-Aware Test for NanoScale CMOS Integrated Circuits funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/tcad.2013.2295812

Publication URI: http://dx.doi.org/10.1109/tcad.2013.2295812

Type: Journal Article/Review

Parent Publication: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Issue: 5