Analysis of Resistive Bridge Defect Delay Behavior in the Presence of Process Variation (2011)

First Author: Zhong S
Attributed to:  Variation-Aware Test for NanoScale CMOS Integrated Circuits funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/ats.2011.16

Publication URI: http://dx.doi.org/10.1109/ats.2011.16

Type: Conference/Paper/Proceeding/Abstract

ISBN: 978-1-4577-1984-4