The accuracy and scalability of continuous-time Bayesian inference in analogue CMOS circuits (2014)
Attributed to:
Fine-Grain Parallel Cellular Processor Arrays in 3D Silicon Technologies
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/iscas.2014.6865450
Publication URI: http://dx.doi.org/10.1109/iscas.2014.6865450
Type: Conference/Paper/Proceeding/Abstract