Low damage fully self-aligned replacement gate process for fabricating deep sub-100 nm gate length GaAs metal-oxide-semiconductor field-effect transistors (2010)
Attributed to:
III-V MOSFETs for Ultimate CMOS
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1116/1.3501355
Publication URI: http://dx.doi.org/10.1116/1.3501355
Type: Journal Article/Review
Parent Publication: Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena
Issue: 6