A Selective Harmonic Elimination approach to DC link balancing for a Multilevel Rectifier (2006)
Attributed to:
Platform: Future Technologies in Power Electronics
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/epepemc.2006.4778392
Publication URI: http://dx.doi.org/10.1109/epepemc.2006.4778392
Type: Conference/Paper/Proceeding/Abstract
ISBN: 1-4244-0121-6