An Automated Flow for Arithmetic Component Generation in Field-Programmable Gate Arrays (2010)
Attributed to:
Reconfigurable Architecture Design: An Optimization Approach
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1145/1839480.1839483
Publication URI: http://dx.doi.org/10.1145/1839480.1839483
Type: Journal Article/Review
Parent Publication: ACM Transactions on Reconfigurable Technology and Systems
Issue: 3