Evaluation of Random Delay Insertion against DPA on FPGAs (2010)

First Author: Lu Y
Attributed to:  Centre for Secure Information Technologies (CSIT) funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1145/1857927.1857938

Publication URI: http://dx.doi.org/10.1145/1857927.1857938

Type: Journal Article/Review

Parent Publication: ACM Transactions on Reconfigurable Technology and Systems

Issue: 1