FPGA Implementations of the Round Two SHA-3 Candidates (2010)

First Author: Baldwin B
Attributed to:  Centre for Secure Information Technologies (CSIT) funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/fpl.2010.84

Publication URI: http://dx.doi.org/10.1109/fpl.2010.84

Type: Conference/Paper/Proceeding/Abstract

ISBN: 978-1-4244-7842-2