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Semi-automatic extraction and exploitation of hierarchical pipeline parallelism using profiling information (2010)

First Author: Tournavitis G

Attributed to: Automated Synthesis of High Performance Low Power Embedded Systems funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1145/1854273.1854321

Publication URI: http://dx.doi.org/10.1145/1854273.1854321

Type: Conference/Paper/Proceeding/Abstract

ISBN: 9781450301787