Early partial evaluation in a JIT-compiled, retargetable instruction set simulator generated from a high-level architecture description (2013)

First Author: Wagstaff H
Attributed to:  Dynamic Adaptation in Heterogeneous Multicore Embedded Processors funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1145/2463209.2488760

Publication URI: http://dx.doi.org/10.1145/2463209.2488760

Type: Conference/Paper/Proceeding/Abstract

ISBN: 9781450320719