Multi-standard reconfigurable motion estimation processor for hybrid video codecs (2011)

First Author: Nunez-Yanez J
Attributed to:  Energy Efficient Networks-on-Chip for Dynamically Reconfigurable Computing Platforms. funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1049/iet-cdt.2009.0070

Publication URI: http://dx.doi.org/10.1049/iet-cdt.2009.0070

Type: Journal Article/Review

Parent Publication: IET Computers & Digital Techniques

Issue: 2