Transparent insertion of latency-oblivious logic onto FPGAs (2014)
Attributed to:
Custom Computing for Advanced Digital Systems
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/fpl.2014.6927497
Publication URI: http://dx.doi.org/10.1109/fpl.2014.6927497
Type: Conference/Paper/Proceeding/Abstract