An FPGA Architecture and CAD Flow Supporting Dynamically Controlled Power Gating (2016)
Attributed to:
Custom Computing for Advanced Digital Systems
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/tvlsi.2015.2393914
Publication URI: http://dx.doi.org/10.1109/tvlsi.2015.2393914
Type: Journal Article/Review
Parent Publication: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Issue: 1