Enhancing the L1 Data Cache Design to Mitigate HCI (2016)

First Author: Valero A
Attributed to:  DOME: Delaying and Overcoming Microprocessor Errors funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/lca.2015.2460736

Publication URI: http://dx.doi.org/10.1109/lca.2015.2460736

Type: Journal Article/Review

Parent Publication: IEEE Computer Architecture Letters

Issue: 2