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Fine-Grained Link Locking Within Power and Latency Transaction Level Modelling in Wormhole Switching Non-Preemptive Networks On Chip (2014)

First Author: Silvano C

Attributed to: LowPowNoC - Evaluation and reduction of power dissipation in multicore systems based on Networks-on-Chip funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1145/2556863.2556865

Publication URI: http://dx.doi.org/10.1145/2556863.2556865

Type: Conference/Paper/Proceeding/Abstract

ISBN: 9781450326070