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Effective Barrier Synchronization on Intel Xeon Phi Coprocessor

First Author: Rodchenko A

Attributed to: Hybrid Static / Dynamic Optimisations for Many-Cores: Breaking the Memory Wall funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1007/978-3-662-48096-0_45

Publication URI: http://dx.doi.org/10.1007/978-3-662-48096-0_45

Type: Book Chapter

Book Title: Euro-Par 2015: Parallel Processing - 21st International Conference on Parallel and Distributed Computing, Vienna, Austria, August 24-28, 2015, Proceedings (2015)

Page Reference: 588-600

ISBN: 978-3-662-48095-3