A Novel Integrated Circuit Design Methodology Using Dynamic Library Concept with Reduced Non-Recurring Engineering Cost and Time-to-Market (2014)

First Author: Sabbavarapu S
Attributed to:  Process Variation Aware Synthesis of Nano-CMOS Circuits funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1166/jolpe.2014.1334

Publication URI: http://dx.doi.org/10.1166/jolpe.2014.1334

Type: Journal Article/Review

Parent Publication: Journal of Low Power Electronics

Issue: 3