FPGA based gate signal generator for three-level neutral point clamped inverters (2015)
Attributed to:
Investigating the Power Density of Power Electronics
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/cpe.2015.7231112
Publication URI: http://dx.doi.org/10.1109/cpe.2015.7231112
Type: Conference/Paper/Proceeding/Abstract