Hardware Demonstrator of a Level-1 Track Finding Algorithm with FPGAs for the Phase II CMS Experiment (2016)

First Author: Cieri D
Attributed to:  Bristol Particle Physics Consolidated Grant 2012-17 funded by STFC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1088/1742-6596/762/1/012020

Publication URI: http://dx.doi.org/10.1088/1742-6596/762/1/012020

Type: Journal Article/Review

Parent Publication: Journal of Physics: Conference Series