[SKA-UMan contribution to] TIM#5 documentation: intermediate CSP milestone including Signal Processing Model (ED-7), DDD (ED-4a), Requirements (ED-1a/b), Testing (ED-3a/b), Development Plan (ED-6) (2016)

First Author: Stappers B
Attributed to:  SKA Design and Pre-Construction Phase funded by STFC

Abstract

No abstract provided

Bibliographic Information

Type: Technical Report