Designing Low-Power, Low-Latency Networks-on-Chip by Optimally Combining Electrical and Optical Links (2017)

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/hpca.2017.23

Publication URI: http://dx.doi.org/10.1109/hpca.2017.23

Type: Conference/Paper/Proceeding/Abstract