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Influence of gate bias on the avalanche ruggedness of SiC power MOSFETs (2017)

First Author: Fayyaz A

Attributed to: Underpinning Power Electronics 2012: Devices Theme funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.23919/ispsd.2017.7988986

Publication URI: http://dx.doi.org/10.23919/ispsd.2017.7988986

Type: Conference/Paper/Proceeding/Abstract