Impact of temperature imbalance on junction temperature identification for multiple chip modules using TSEPs (2017)
Attributed to:
High Current Module and Technologies Optimised for HVDC
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/sbmicro.2017.7990732
Publication URI: http://dx.doi.org/10.1109/sbmicro.2017.7990732
Type: Other
Parent Publication: PCIM Europe 2017 - International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management