Reconfigurable asynchronous pipelines: From formal models to silicon (2018)
Attributed to:
A4A: Asynchronous design for analogue electronics
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.23919/date.2018.8342264
Publication URI: http://dx.doi.org/10.23919/date.2018.8342264
Type: Conference/Paper/Proceeding/Abstract