A machine learning attack resistant multi-PUF design on FPGA (2018)

First Author: Ma Q

Attributed to: CSIT 2 funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/aspdac.2018.8297289

Publication URI: http://dx.doi.org/10.1109/aspdac.2018.8297289

Type: Conference/Paper/Proceeding/Abstract