Large scale RO PUF analysis over slice type, evaluation time and temperature on 28nm Xilinx FPGAs (2018)

First Author: Hesselbarth R

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/hst.2018.8383900

Publication URI: http://dx.doi.org/10.1109/hst.2018.8383900

Type: Conference/Paper/Proceeding/Abstract