Significance-Driven Logic Compression for Energy-Efficient Multiplier Design (2018)
Attributed to:
Dream Fellowship: Energy-Modulated Computing
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/jetcas.2018.2846410
Publication URI: http://dx.doi.org/10.1109/jetcas.2018.2846410
Type: Journal Article/Review
Parent Publication: IEEE Journal on Emerging and Selected Topics in Circuits and Systems
Issue: 3