Concurrency-Aware Thread Scheduling for High-Level Synthesis (2018)
Attributed to:
PRiME: Power-efficient, Reliable, Many-core Embedded systems
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/fccm.2018.00025
Publication URI: http://dx.doi.org/10.1109/fccm.2018.00025
Type: Conference/Paper/Proceeding/Abstract