Smart-Cache: Optimising Memory Accesses for Arbitrary Boundaries and Stencils on FPGAs (2019)
Attributed to:
Exploiting Parallelism through Type Transformations for Hybrid Manycore Systems
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/ipdpsw.2019.00024
Publication URI: http://dx.doi.org/10.1109/ipdpsw.2019.00024
Type: Conference/Paper/Proceeding/Abstract