Circuit optimization using device layout motifs (2014)
Attributed to:
PAnDA: Programmable Analogue and Digital Array
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/vari.2014.6957081
Publication URI: http://dx.doi.org/10.1109/vari.2014.6957081
Type: Conference/Paper/Proceeding/Abstract