Design Flow for Hybrid CMOS/Memristor Systems-Part I: Modeling and Verification Steps (2021)
Attributed to:
Functional Oxide Reconfigurable Technologies (FORTE): A Programme Grant
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/tcsi.2021.3122343
Publication URI: http://dx.doi.org/10.1109/tcsi.2021.3122343
Type: Journal Article/Review
Parent Publication: IEEE Transactions on Circuits and Systems I: Regular Papers
Issue: 12