Low-Latency Asynchronous Logic Design for Inference at the Edge (2021)

First Author: Wheeldon A
Attributed to:  A4A: Asynchronous design for analogue electronics funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.23919/date51398.2021.9474126

Publication URI: http://dx.doi.org/10.23919/date51398.2021.9474126

Type: Conference/Paper/Proceeding/Abstract