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FPGA-Based Acceleration for Bayesian Convolutional Neural Networks (2022)

First Author: Fan H

Attributed to: DART: Design Accelerators by Regulating Transformations funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/tcad.2022.3160948

Publication URI: http://dx.doi.org/10.1109/tcad.2022.3160948

Type: Journal Article/Review

Parent Publication: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Issue: 12